Navitas and Microchip unveil 800V GaN design for AI data centres
Navitas Semiconductor and Microchip Technology have jointly released an 800V DC-to-6V DC reference design aimed at AI data centre rack power applications. The collaboration pairs Navitas' GaNFast gallium nitride (GaN) power devices with Microchip's digital signal controllers and hardware security components, providing system developers with a documented path to implement high-efficiency power conversion in line with the Open Compute Project (OCP) 800V DC standard.
The reference platform will be showcased at Microchip's OCP Event in San Jose, California, running 12 to 15 October 2026, and will ship with reference hardware, firmware and supporting documentation.
Technical architecture
At the core of the design are Microchip's dsPIC33AK Digital Signal Controllers (DSCs), running a 200 MHz 32-bit core with a double-precision floating-point unit, high-resolution 78 ps pulse-width modulators, and 12-bit analogue-to-digital converters operating at up to 40 MSPS. These components handle the fast, deterministic control loops required for high-frequency DC/DC conversion. The power switching stage uses 16 NV6034 GaNFast FETs rated at 650 V and 17 milliohms, arranged in a stacked half-bridge topology. Navitas says the power delivery board targets 96% peak efficiency at full load with a 1 MHz switching frequency, achieving a power density of 2,100 W per cubic inch.
The design collapses a two-stage conversion path, 800V to 50V and 50V to 6V, into a single converter, which the companies say improves end-to-end efficiency and reduces board footprint. The power delivery board is described as approximately 20% thinner than a mobile phone, enabling close integration with GPU boards to improve transient response.
Security is addressed through Microchip's TA100 CryptoAuthentication device, which provides hardware-rooted secure boot, message authentication code generation, trusted firmware updates, and support for Transport Layer Security. Notably, the dsPIC33AK DSC also carries library support for the US National Security Agency's Commercial National Security Algorithm Suite 2.0 post-quantum cryptographic algorithms, making this one of the first power-management reference designs to embed post-quantum cryptography (PQC) readiness at the controller level.
Market context and competitive positioning
The move toward 800V DC rack architectures reflects a broader industry reckoning with power density. As GPU clusters for AI training and inference draw tens of kilowatts per rack, the traditional 48V distribution bus introduces resistive losses that 800V architectures substantially reduce. The OCP 800V standard is gaining traction among hyperscale operators and co-location providers seeking to standardise next-generation rack designs.
GaN power semiconductors are increasingly displacing conventional silicon MOSFETs in data centre power conversion because of their higher switching frequency, lower on-resistance, and smaller thermal footprint. Navitas competes in this space with players including Infineon, onsemi, and STMicroelectronics, all of which have active GaN or silicon carbide programmes targeting data centre applications. Microchip's involvement adds a differentiated security layer, an angle that is gaining relevance as operators contend with supply-chain integrity requirements and emerging OCP security specifications.
Regulatory read-across
The inclusion of CNSA Suite 2.0 PQC algorithm support in a power controller is a forward-looking nod to US federal procurement trends. NIST finalised its first set of post-quantum cryptographic standards in 2024, and US agencies are required to migrate to approved PQC algorithms by 2030 under National Security Memorandum 10. Embedding PQC at the firmware level in power supply controllers could become a compliance requirement for vendors supplying AI infrastructure to government and regulated enterprise customers, giving this reference design a potential standards-differentiation angle beyond raw efficiency numbers.
The immediate commercial test will be customer adoption of the reference design at volume. Both companies have stopped short of naming a launch customer or disclosing committed orders, so independent benchmark validation and a named production win remain the key milestones to watch.